IP Cores, Inc. announces additional shipments of MSP7 MACsec cores

June 17, 2025 10:00 PM AEST | By EIN Presswire
 IP Cores, Inc. announces additional shipments of MSP7 MACsec cores
Image source: EIN Presswire
PALO ALTO, CA, UNITED STATES, June 17, 2025 /EINPresswire.com/ -- IP Cores, Inc., California, USA (http://www.ipcores.com ) has announced additional shipments of the MSP7-32 and MSP7-64 cores for MACsec support in FPGA and ASIC

“MSP7 is a very efficient and field-proven MACsec accelerator targeting data rates of 10 to 25 Gbps in FPGAs and 100+ Gbps in modern ASICs” said Dmitri Varsanofiev, CTO of IP Cores, Inc “Both 32 and 64-bit bus configurations are available and provide true line-rate performance with no de-rating for short Ethernet frames.”

MSP7
The MSP7 MACsec cores are designed for high data rates and implement complete line-rate packet processing with no per-packet CPU intervention. The MSP7-32 and MSP7-64 are tuned for 6-15 and 10-25 Gbps respectively for application in the FPGA and 25-100 Gbps in ASIC technologies that use 256 bit AES keys.

MACsec
MACsec is a protocol defined by the IEEE Standard Association as IEEE 802.1AE. It is a network security standard that operates at the medium access control level (e.g., Ethernet) and defines connectionless data confidentiality and integrity for media access independent protocols. (https://en.wikipedia.org/wiki/IEEE_802.1AE)

About IP Cores, Inc.

IP Cores (http://www.ipcores.com) is a long-established California company in the field of security, error correction, data compression, and DSP IP cores. Founded in 2004, the company provides hardware IP cores for embedded, communications and storage fields, including AES-based ECB/CBC/OCB/CFB, AES-
GCM and AES-XTS cores, MACsec 802.1AE, IPsec and SSL/TLS protocol processors, flow-through AES/CCM cores with header parsing for IEEE 802.11 (WiFi), 802.16e (WiMAX), 802.15.3 (MBOA), 802.15.4 (Zigbee), public-key accelerators for RSA and elliptic curve cryptography (ECC), true random number generators (TRNG), cryptographically secure pseudo-random number generators (CS PRNG), secure SHA and MD5 cryptographic hashes, lossless data compression cores, low-latency and low-power fixed and floating-point FFT and IFFT cores, as well as cyclic, Reed-Solomon, LDPC, BCH and Viterbi forward error correction (FEC) decoder cores.
All mentioned trademarks and registered trademarks are the property of their respective owners.

Dmitri Varsanofiev
IP Cores
+1 650-815-7996
email us here
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