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IDS-Integrate is a comprehensive solution designed to automate the assembly of complex SoC designs by integrating numerous intellectual property (IP) blocks, including RTL, IP-XACT, and SystemRDL components, into a cohesive top-level design. The tool employs artificial intelligence to intelligently stitch IPs using multiple types of interconnects, thereby maintaining interconnect integrity even as specifications evolve.
Eugin Liu, R&D vice president of iCatch Technology stated, "Integrating IDS-Integrate into our design workflow allows us to automate complex SoC assembly tasks, reducing manual errors and accelerating our development timeline. This aligns with our commitment to delivering high-performance, cost-effective solutions to our customers–particularly in the development of our ThetaEyeTM AI solution SoC through our Vision-ASIC design services model."
Anupam Bakshi, CEO of Agnisys, commented, "We are excited to collaborate with iCatch Technology as they use IDS-Integrate for their SoC development. Our solution is designed to address the complexities of modern chip design, and we look forward to supporting iCatch Technology in achieving their innovation goals."
By implementing IDS-Integrate, iCatch Technology aims to:
● Enhance Productivity: Automate the interconnection of design blocks, reducing manual coding errors and accelerating development cycles using IDS-Integrate features like Automated Assembly & Packaging, Intelligent Interconnect Stitching and Hierarchy Management through its extensive API support in Python3, TCL, JAVA and C++.
● Ensure Design Integrity: Automatically generate RTL components such as bus multiplexers, aggregators, and protocol bridges, ensuring correct-by-construction designs. IDS-Integrate allows managing all SoC/IP related data including interconnects, SystemVerilog, UPF, SDC, CDC, and registers within a single platform.
● Facilitate Specification Compliance: Maintain interconnect integrity automatically as design specifications change, reducing the risk of errors during the integration phase. Import data from formats such as XML, SystemRDL and Excel to generate tailored SoC collateral, including documentations, testbenches, assertions, and SystemC models.
For more information about IDS-Integrate and its capabilities, please visit www.agnisys.com/products/ids-integrate/. IDS-Integrate is a key component of the Agnisys IDesignSpec Suite.
About iCatch Technology
iCatch Technology is a global technology leader specializing in intelligent imaging, AI-driven SoC design and services, and semiconductor solutions. The company is dedicated to developing advanced technologies that power the next generation of smart devices in automotive, home security, consumer wearables, drone, robotics, and industrial applications. For more information about iCatch Technology, please visit www.icatchtek.com.
About Agnisys
Agnisys is a provider of Electronic Design Automation (EDA) software and methodology services, solving complex front-end design, verification, and validation problems in system chip development. Its ISO certified IDesignSpec™ Solution Suite leverages a golden executable specification to capture and centralize registers, sequences, and connectivity for Intellectual Property (IP) and System-on-a-Chip (SoC) projects. Its intuitive user interfaces and standards-based workflows reduce risk by eliminating development errors while increasing productivity and efficiency through the automatic generation of collateral for the entire project development team. Founded in 2007, Agnisys is headquartered in Boston, Massachusetts, with R&D centers in the United States and India. Learn more at www.agnisys.com.
Tom Anderson
Agnisys, Inc.
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